GSTL

Courses

Thu, 16 Jul 2026 00:00:00 +0000

Courses

Extension and Implementation of Application-Specific Instruction Sets for Open-Source Processors

Thu, 01 Jan 2015 00:00:00 +0000

Extension and Implementation of Application-Specific Instruction Sets for Open-Source Processors

Theses

Ahmet Çağrı Bağbaba, “Implementation of a LEON3 Microprocessor-Based System,” 2015.
Latif Akçay, “Implementation and Applications of Open-Source OpenRISC-Based Systems-on-Chip,” 2015.
İsmail Demir, “Fault-Injection-Resistant Implementation of the RSA Algorithm on a Three-Core LEON3 Processor-Based System,” 2018.

Publications

Ç. Bağbaba, B. Örs, “Hardware Implementation of Novel Image Compression-Encryption System on an FPGA,” ELECO 2015.
L. Akçay, M. Tükel, B. Örs, “Design and Implementation of an OpenRISC System-on-Chip with an Encryption Peripheral,” ECCTD 2017.

Mon, 01 Jan 0001 00:00:00 +0000

Research Areas

Cryptography
- Electronic System Design for Cryptography
- Power Consumption / Electromagnetic Emission Analysis Attacks and Countermeasures
Modeling and Implementation of Cybersecurity Protocols
Embedded System Design and FPGA / ASIC Implementations
- Secure RFID and Payment Systems
- Secure Internet of Things (IoT) Networks
- Digital Signal Processing
- Image and Video Processing
- Artificial Neural Networks
- Deep Learning
- Random Number Generators
Application-Specific Instruction-Set Processor (ASIP) Design and Implementation

Mon, 01 Jan 0001 00:00:00 +0000

Academic and Industrial Collaborations

Mon, 01 Jan 0001 00:00:00 +0000

Academic and Industrial Collaborations

Academic Collaborations

International Collaborations

Katholieke Universiteit Leuven (KU Leuven), Department of Electrical Engineering, Computer Security and Industrial Cryptography Group (COSIC), Prof. Dr. Bart Preneel.
Université catholique de Louvain (UCL), Department of Computer Engineering, Prof. Dr. Gildas Avoine.
Katholieke Universiteit Leuven (KU Leuven), Department of Electrical Engineering, Center for Dynamical Systems, Signal Processing and Data Analytics (STADIUS), Prof. Dr. Joos Vandewalle.
University of Salento, Lecce, Department of Innovation Engineering, Pietro Vecchio.
University of Sharjah, Department of Electrical Engineering, Prof. Dr. Ahmed S. Elwakil.
The University of Arizona, Department of Mathematics, Prof. Dr. Ali Oksasoglu and Prof. Dr. Qiudong Wang.
Urmia Azad University, Department of Electrical Engineering, Dr. Ali Naderi Saatlo.
University of Catania, Department of Electrical, Electronic and Computer Engineering.
The Ohio State University, Prof. Waleed Khalil and Dr. Tawfik Eslam Yahya.

National Collaborations

Boğaziçi University, Department of Computer Engineering, Prof. Dr. Arda Yurdakul.
Dokuz Eylül University, Department of Electrical and Electronics Engineering, Assoc. Prof. Dr. Selçuk Kılınç.
Istanbul University, Department of Computer Engineering, Prof. Dr. Sabri Arık.
Boğaziçi University, Department of Electrical and Electronics Engineering, Prof. Dr. Oğuzhan Çiçekoğlu.

Industrial Collaborations

Defne Telekomünikasyon A.Ş.: Building as a Service (BaaS), European Union.

Artificial Neural Networks

Mon, 01 Jan 0001 00:00:00 +0000

Hardware Implementations of Cellular Neural Networks

Theses

PhD Theses

Ramazan Yeniçeri, “Implementations of Novel Cellular Nonlinear and Cellular Logic Networks and Their Applications,” 2015.

Master’s Theses

Mehmet Tükel, “Implementation of a Cellular Neural Network Using VHDL,” 2009.
Ramazan Yeniçeri, “Digital Design and Implementation of a Cellular Neural Network for Path-Finding Applications,” 2009.
Tuba Ayhan, “Using a CNN-Based Antennal Lobe Model to Accelerate Odor Classification,” 2010.
Volkan Kılıç, “Real-Time Robot Navigation in a Changing Environment Using a Dynamic Cellular Neural Network,” 2010.
Selman Ergünay, “Design of a Real-Time Embedded System Inspired by Nature and Based on Olfaction and Binocular Vision,” 2013.
Barış Karakaya, “Digital Design and Implementation of a Cellular Neural Network Using Fixed-Point Arithmetic,” 2014.
Volkan Meriç, “Design and FPGA Implementation of a Cellular Neural Network Processor,” 2016.
Erdem Köse, “Joint Implementation of a Cellular Neural Network and CNN-Specific Learning Algorithms on FPGA,” 2017.

Publications

R. Yeniçeri, M. Yalçın, “Multi-scroll Chaotic Attractors from a Generalized Time-delay Sampled-data System,” International Journal of Circuit Theory and Applications, 2015.
T. Ayhan, M. Yalçın, “An Application of Small-world Cellular Neural Networks on Odor Classification,” International Journal of Bifurcation and Chaos, vol. 22, no. 1.
V. Kılıç, R. Yeniçeri, M. Yalçın, “A New Active Wave Computing Based Real-Time Mobile Robot Navigation Algorithm for Dynamic Environment,” CNNA 2010.
T. Ayhan, R. Yeniçeri, S. Ergünay, M. Yalçın, “Hybrid Processor Population for Odor Processing,” ISCAS 2012.
B. Karakaya, R. Yeniçeri, M. Yalçın, “Wave Computer Core Using Fixed-Point Arithmetic,” ISCA 2015.
V. Meriç, M. Yalçın, “A New Implementation of Fully Programmable Complete CNN Processor Core on FPGA,” CNNA 2016.
E. Köse, M. Yalçın, “Emulating CNN with Template Learning on FPGA,” ECCTD 2017.
M. Tükel, M. Yalçın, “A New Architecture for Cellular Neural Network on Reconfigurable Hardware with an Advance Memory Allocation Method,” CNNA 2010.
R. Yeniçeri, M. Yalçın, “Path Planning on Cellular Nonlinear Network Using Active Wave Computing Technique,” SPIE 2009.

BLG520E - Cryptography

Mon, 01 Jan 0001 00:00:00 +0000

BLG520E - Cryptography

The course covers cryptographic concepts ranging from the earliest examples of encryption in history to modern cryptographic methods.
Students who successfully complete the course are expected to acquire knowledge and skills in the following areas:
- Understanding why and how classical cryptographic systems were developed.
- Applying probability theory and analyzing product ciphers.
- Understanding substitution–permutation networks and applying linear and differential cryptanalysis to them.
- Implementing the DES and AES algorithms.
- Implementing the RSA cryptosystem.

Consulting Services Provided to Companies

Mon, 01 Jan 0001 00:00:00 +0000

Consulting Services Provided to Companies

ANKA Mikroelektronik Sistemler A.Ş.

Implementation of the LEON3 Processor on FPGA

The company was established at ITU GSTL in 2013 through a project supported under the TÜBİTAK 1512 Rapid Support Program.
It has since become an organization conducting joint projects with ASELSAN, TÜBİTAK, ROKETSAN, and numerous international companies.
A system-on-chip (SoC) was implemented on FPGA using the 32-bit open-source LEON3 processor.
Open-source software-defined radio applications were executed on the system.

Development of a RISC-V-Based Microprocessor

Within the national microprocessor development project, open-source RISC-V designs are planned to be used as a foundation and extended with application-specific enhancements.
The project aims to develop, for the first time in Türkiye, a 32-bit system-on-chip containing a processor, general-purpose peripherals, and cryptographic IP cores, with both FPGA and ASIC implementations.
FPGA design and testing have been completed, and the ASIC development process has begun.
Significant progress has been made regarding the use of TÜBİTAK TÜTEL licenses.

STM: Development of the MICROSATPRO National Micro-Satellite Computer

TÜBİTAK TEYDEB 1501

Customized Microprocessor Design for Post-Quantum Cryptography Algorithms

Mon, 01 Jan 0001 00:00:00 +0000

Customized Microprocessor Design for Post-Quantum Cryptography Algorithms

With the development of quantum computers, many existing cryptographic techniques may become insecure or unusable.
Developing systems that remain secure against quantum computers is therefore becoming a critical research area.
Application-specific processor design techniques will be investigated and compared. In addition, new techniques will be developed to implement customized microprocessor architectures for emerging problems such as post-quantum cryptography algorithms.

Deep Learning

Mon, 01 Jan 0001 00:00:00 +0000

Deep Learning

We have examined deep convolutional neural network architectures commonly used for classification, including AlexNet, VGG-16, InceptionNet, and ResNet. These networks are typically implemented on GPUs and require substantial computational resources and energy consumption. Our research focuses on methods that enable these networks to operate efficiently on embedded systems while reducing their power consumption.

Design of a Custom Direct Memory Access Module and Its Implementation in a System-on-Chip

Mon, 01 Jan 0001 00:00:00 +0000

Design of a Custom Direct Memory Access Module and Its Implementation in a System-on-Chip

Project Partners

Client Organization: Procenne – Güvenpark Bilişim Teknolojileri Ar-Ge Tic. Ltd. Şti.
Executing Organization: Istanbul Technical University, Embedded Systems Design Laboratory
Funding Organization: TÜBİTAK 1505 University–Industry Cooperation Support Program

Project Team

Project Leader: Prof. Dr. Berna Örs Yalçın

Project Overview

Hardware security modules (HSMs) enable cryptographic algorithms to be implemented securely in hardware while providing high performance.

Development of a National Mobile White-Box Cryptographic Library and an End-to-End Secure Communication System

Mon, 01 Jan 0001 00:00:00 +0000

Development of a National Mobile White-Box Cryptographic Library and an End-to-End Secure Communication System

Project Partners

Private-Sector Partner: Procenne – Güvenpark Bilişim Teknolojileri Ar-Ge Tic. Ltd. Şti.
Project Consultant: Istanbul Technical University, Embedded Systems Design Laboratory
Funding Organization: TÜBİTAK 2244 – Industrial PhD Program

Project Team

Project Leader: Prof. Dr. Berna Örs Yalçın

Project Overview

The increasing use of mobile applications and the growing number of attacks targeting these applications have made security requirements more critical than ever. This situation has created a need for the development of domestic and national mobile security technologies. This need applies to all parties involved in developing and using mobile applications.

EHB425E - Very Large-Scale Integrated Circuit Design II (VLSI II)

Mon, 01 Jan 0001 00:00:00 +0000

EHB425E - Very Large-Scale Integrated Circuit Design II (VLSI II)

The course provides an introduction to the field of digital system design and related design methodologies.
Digital systems are designed from the fundamental level onward using Verilog HDL.
Students who successfully complete the course are expected to gain proficiency in the following areas:
- Understanding the digital integrated circuit (IC) design flow.
- Using digital IC design tools effectively.
- Designing digital circuits.

EHB436E - Digital System Design Applications

Mon, 01 Jan 0001 00:00:00 +0000

EHB436E - Digital System Design Applications

In this course, digital systems are implemented on FPGAs using hardware description languages.
During the first weeks of the course, students are introduced to FPGAs, HDLs, and the development tools to be used.
Digital design concepts are then taught through practical exercises based on eight different laboratory sheets.
The course includes two term projects and one final project.

ELE609E - Low-Power Electronic System Design

Mon, 01 Jan 0001 00:00:00 +0000

ELE609E - Low-Power Electronic System Design

System-level models and design problems: System specification, resources, architectural structures, communication architectures, and hardware/software partitioning.
Hardware power-consumption optimization: Data representation options, data correlation, bus encoding, bus-interface design, memory design, and processor design.
Dynamic power management: Requirements, power-management techniques, and implementation examples.
Projects: Design experiments and the use of development tools.

Electronic System Design for Cryptography

Mon, 01 Jan 0001 00:00:00 +0000

Electronic System Design for Cryptography

Theses

İlker Yavuz, “FPGA Implementation of an Elliptic Curve Cryptosystem,” 2008.
Ahmed Doğan, “Low-Power Design and FPGA Implementation of the AES (Advanced Encryption Standard) Block Cipher Algorithm,” 2008.
Tarık Kaplan, “Low-Power Design and FPGA Implementation of the DES (Data Encryption Standard) Block Cipher Algorithm,” 2009.
Alican Atıcı, “Low-Cost NTRU Implementations,” 2009.
Ünal Kocabaş, “Hardware Implementations of ECC over a Binary Edwards Curve,” 2009.
Dilek Bayhan, “Power-Efficient FPGA Implementation of the RSA Cryptosystem,” 2010.
Ahmet Arış, “Design and Implementation of the RSA Cryptosystem Using a Partially Interleaved Modular Karatsuba–Ofman Multiplier,” 2012.

Publications

A. Doğan, B. Örs, G. Saldamlı, “Analyzing and Comparing the AES Architectures for Their Power Consumption,” Journal of Intelligent Manufacturing, vol. 25, no. 2, pp. 263–271.
B. Acar, B. Örs, “Hardware/Software Co-design of a Lightweight Crypto Algorithm BORON on an FPGA,” ELECO 2017.
U. Esen, B. Örs, “Data Hiding Method Using Image Interpolation and Pixel Symmetry,” ELECO 2015.
A. Bağbaba, B. Örs, “Hardware Implementation of Novel Image Compression-Encryption System on an FPGA,” ELECO 2015.
D. Engin, B. Örs, “Implementation of Enigma Machine Using Verilog on an FPGA,” ELECO 2015.
A. Altıntaş, B. Örs, “System Level Design of Scalable Encryption Algorithm by Using CoWare,” CITS 2013.
A. Arış, G. Saldamlı, B. Örs, “Architectures for Fast Modular Multiplication,” Euromicro DSD 2011.
M. Soybalı, B. Örs, G. Saldamlı, “Implementation of a PUF Circuit on an FPGA,” IFIP 2011.
D. Bayhan, B. Örs, G. Saldamlı, “Analyzing and Comparing the Montgomery Multiplication Algorithms for Their Power Consumption,” ICCES 2010.
V. Dalmışlı, B. Örs, “Design of New Tiny Circuits for AES Encryption Algorithm,” SCS 2009.
A. Atıcı, L. Batina, J. Fan, I. Verbauwhede, B. Örs, “Low-Cost Implementations of NTRU for Pervasive Security,” ASAP 2008.
İ. Yavuz, B. Örs, Ç. Koç, “FPGA Implementation of an Elliptic Curve Cryptosystem over GF(3ᵐ),” ReConFig 2008.
K. Alptekin Bayam, B. Örs, B. Örencik, “A Hardware Implementation of RSA,” SIN 2007.
İ. Yavuz, B. Örs, “Hardware Implementation of Elliptic Curve Cryptosystem over GF(pᵐ),” SIN 2007.

Events

Mon, 01 Jan 0001 00:00:00 +0000

Events

Conferences, Symposiums, and Workshops

Seminars

GSTL Seminars 2016

GSTL Internship

Mon, 01 Jan 0001 00:00:00 +0000

GSTL Internship

Our team offers summer internship opportunities to students.
The GSTL internship program is announced annually on the ITU GSTL website.
A total of 90 students have participated in the internship program over the past three years.
The internship program focuses on teaching hardware description languages and system-on-chip design.

Announcements

Internship Programs

GSTL Summer Internship 2021

Instruction-Set Extension and Implementation of a RISC-V Processor for a Driver Fatigue Detection System

Mon, 01 Jan 0001 00:00:00 +0000

Instruction-Set Extension and Implementation of a RISC-V Processor for a Driver Fatigue Detection System

Project Partners

Partner in Türkiye: Istanbul Technical University, Embedded Systems Design Laboratory
Partner in Iran: Urmia University, Asst. Prof. Dr. Morteza Mousazadeh
Funding Organization: TÜBİTAK 2535 Bilateral Cooperation Program with the Ministry of Science, Research and Technology of Iran (MSRT)

Project Team

Project Leader: Prof. Dr. Berna Örs Yalçın

Project Summary

Embedded systems are designed to meet application-specific performance requirements, including speed, accuracy, reliability, and cost efficiency. By definition, an embedded system consists of application-specific hardware and software components. However, as the complexity of the target system increases, the required workforce and breadth of expertise also grow, making the system more difficult to design, manage, and operate.

Laboratory Directors

Mon, 01 Jan 0001 00:00:00 +0000

Laboratory Directors

Prof. Dr. Berna ÖRS YALÇIN

Phone: +90 212 285 36 03

Email: siddika.ors@itu.edu.tr

Webpage: web.itu.edu.tr/~orssi

Prof. Dr. Müştak Erhan YALÇIN

Phone: +90 212 285 36 12

Email: mustak.yalcin@itu.edu.tr

Webpage: web.itu.edu.tr/~yalcinmust

Prof. Dr. Serdar ÖZOĞUZ

Phone: +90 212 285 36 19

Email: ozoguz@itu.edu.tr

Webpage: web.itu.edu.tr/~ozoguz

Power Consumption / Electromagnetic Emission Analysis Attacks and Countermeasures

Mon, 01 Jan 0001 00:00:00 +0000

Power Consumption / Electromagnetic Emission Analysis Attacks and Countermeasures

Theses

Levent Ordu, “FPGA Implementation of the AES Algorithm and Its Hardening Against Side-Channel Analysis Attacks,” 2006.
Hakan Kayış, “Power Analysis Attacks Against FPGA Implementations of AES,” 2006.
Keklik Alptekin Bayam, “Power Analysis Resistant Hardware Implementation of the RSA Cryptosystem,” 2007.
Ferhat Karakoç, “A Hybrid Method in Cryptanalysis: Collision Attack,” 2008.
Muhammet Şahinoğlu, “Electromagnetic Analysis Attacks Against FPGA Implementations of the AES (Advanced Encryption Standard) Block Cipher Algorithm,” 2008.
Çisem Kula, “Implementation of the AES (Advanced Encryption Standard) Block Cipher Algorithm on a Microprocessor and Differential Power Analysis Attack,” 2009.
Kenan Türksoy, “Differential Power Analysis Attack on an FPGA Implementation of TEA,” 2013.

Publications

K. Alptekin Bayam, B. Örs, “Differential Power Analysis Resistant Hardware Implementation of the RSA Cryptosystem,” The Turkish Journal of Electrical Engineering & Computer Sciences, vol. 18, no. 1, pp. 129–140, 2010.
A. Ü. Daniş, B. Örs, “Differential Power Analysis Attack Considering Decoupling Capacitance Effect,” The 19th European Conference on Circuit Theory and Design (ECCTD), pp. 359–362, Antalya, Turkey, August 23–27, 2009.
K. Alptekin Bayam, B. Örs, “Differential Power Analysis Resistant Hardware Implementation of the RSA Cryptosystem,” IEEE International Symposium on Circuits and Systems (ISCAS), pp. 3314–3317, Seattle, Washington, USA, 2008.
L. Ordu, B. Örs, “Power Analysis Resistant Hardware Implementations of AES,” The 14th IEEE International Conference on Electronics, Circuits and Systems, pp. 1408–1411, Marrakech, Morocco, December 11–14, 2007.

Publications

Mon, 01 Jan 0001 00:00:00 +0000

2025

Journal Articles

FPGA realization of a controllable 4-D hyperchaotic system for quantum-inspired medical image encryption
Lalili Y., Bouden T., Grimes M., Yalcin M.E., Abderrazak L., Elbasi E.

Physica Scripta, Vol. 100, No. 7

International· Q2
DOI: 10.1088/1402-4896/adea21
HADQ-Net: A Power-Efficient and Hardware-Adaptive Deep Convolutional Neural Network Translator Based on Quantization-Aware Training for Hardware Accelerators
Oflamaz C.U., Yalçın M.E.

Electronics (Switzerland), Vol. 14, No. 18

International· Q2· Citations: 2
DOI: 10.3390/electronics14183686
LQR-Based PID Optimization for Model-Based Control of Brushless DC Motors in HEVs
İn S., Örs B., Tiryaki H.

Electrica, Vol. 25, No. 1

International· Q3
DOI: 10.5152/electrica.2025.24186

Conference Papers

Creating Verification Environment Using RISCV-DV With Open and Closed Source Tools
Eroǧlu D.Z., Özden M.K., Örs B.
ISMSIT 2025 - 9th International Symposium on Multidisciplinary Studies and Innovative Technologies, Proceedings
International
DOI: 10.1109/ISMSIT67332.2025.11268019
Efficient Hardware Implementation of the Toom-Cook-4 Algorithm Using a Pipelined Architecture on FPGA
Calikus A., Caliskan S., Ors B.
2025 18th International Conference on Information Security and Cryptology, ISCTurkiye 2025 - Proceedings
International
DOI: 10.1109/ISCTrkiye68593.2025.11224856
First-Order Threshold Implementation of AES Against Side-Channel Attacks on FPGA
Calikus A., Caliskan S., Ors B., Malal A., Eker K., Aksoy B.
2025 18th International Conference on Information Security and Cryptology, ISCTurkiye 2025 - Proceedings
International· Citations: 1
DOI: 10.1109/ISCTrkiye68593.2025.11224814
Narrowband Beamforming using Phase Shifters on FPGA: A Model-Based Design Approach with Hardware/Software Co-Implementation
Yilmaz H.M., Örs B.
Proceedings of the International Conference on Cybernetics and Informatics, K and I
International
DOI: 10.1109/KI64036.2025.10916473
Trust Based Access Control For Dynamically Reconfigurable Sensor Network
Demirturk M.O., Ors B.
21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design, SMACD 2025
International
DOI: 10.1109/SMACD65553.2025.11091928

2024

Journal Articles

A novel S-box design based on quantum tent maps and fractional stochastic models with an application in image encryption
Hematpour N., Gharari F., Ors B., Yalcin M.E.

Soft Computing, Vol. 28, No. 7-8, pp. 6235–6268

International· Q2· Citations: 6
DOI: 10.1007/s00500-023-09478-x
A statistical method of GPS spoofing detection using power spectral density for hardware
Tanış M., Erhan Yalçın M.

International Journal of Circuit Theory and Applications, Vol. 52, No. 5, pp. 2560–2573

International· Q3
DOI: 10.1002/cta.3858
Dynamic analysis and circuit realization of a new controllable hyperchaotic system
Lalili Y., Bouden T., Grimes M., Yalcin M.E., Lachouri A., Elbasi E.

Physica Scripta, Vol. 99, No. 3

International· Q3· Citations: 5
DOI: 10.1088/1402-4896/ad274e
Model-based, fully simulated, system-level power consumption estimation of IoT devices
Özkaya Ö., Örs B.

Microprocessors and Microsystems, Vol. 105

International· Q2· Citations: 10
DOI: 10.1016/j.micpro.2024.105009

Conference Papers

Hardware Implementation of K2RED and Plantard Modular Multiplication Algorithms in Post-Quantum Cryptography
Can F., Ustun A., Ors B., Alaybeyoglu E., Savas E.
2024 Panhellenic Conference on Electronics and Telecommunications, PACET 2024 - Proceedings
International· Citations: 3
DOI: 10.1109/PACET60398.2024.10497033
Harnessing a New 5-D Hyperchaotic System with Fibonacci Q-Matrix Encryption Scheme
Lalili Y., Bouden T., Grimes M., Yalcin M.E., Lachouri A., Elbasi E.
ICAEE 2024 - International Conference on Advanced Electrical Engineering 2024
International· Citations: 2
DOI: 10.1109/ICAEE61760.2024.10783218
Model-Based FPGA AI Accelerator Design Using Vitis AI with In-Depth Performance and Energy Efficiency Analysis
Ozdil G., Ors B.
2024 32nd Telecommunications Forum, TELFOR 2024 - Proceedings of Papers
International· Citations: 4
DOI: 10.1109/TELFOR63250.2024.10819065
Single Event Upset Tolerant TRNG Design and Its Tests under Radiation
Yilmaz O.O., Demirkoz M.B., Yalcin M.E.
2024 39th Conference on Design of Circuits and Integrated Systems, DCIS 2024
International· Citations: 1
DOI: 10.1109/DCIS62603.2024.10769157
Spoofed GPS L1 Carrier C/A Code Manipulation Attack; [Sahte GPS L1 Taşıyıcısı C/A Kodu Manipülasyonu Saldırısı]
Tanış M., Yalçın M.E.
32nd IEEE Conference on Signal Processing and Communications Applications, SIU 2024 - Proceedings
National
DOI: 10.1109/SIU61531.2024.10601095

2023

Conference Papers

An Open-Source eFPGA-based SoC Design for Computation Acceleration
Eryilmaz Y.E., Yantir H.E., Yalçin M.E.
ICECS 2023 - 2023 30th IEEE International Conference on Electronics, Circuits and Systems: Technosapiens for Saving Humanity
International
DOI: 10.1109/ICECS58634.2023.10382739
Design and Implementation of a Lightweight Bloom Filter Accelerator for IoT Applications
Seymen H.A., Yalçin M.E.
14th International Conference on Electrical and Electronics Engineering, ELECO 2023 - Proceedings
International· Citations: 1
DOI: 10.1109/ELECO60389.2023.10415987
FPGA-Based Implementation of a Matched Filter for Acoustic Shooter Localization System; [Akustik Atiş Yeri Tespit Sistemi için FPGA Tabanli Eşlenik Süzgeç Gerçekleştirilmesi]
Baki B.M., Yalçin M.E.
31st IEEE Conference on Signal Processing and Communications Applications, SIU 2023
National
DOI: 10.1109/SIU59756.2023.10224025
Implementation of CRYSTALS-Kyber Post-Quantum Algorithm Using RISC-V Processor
Celik A., Yilmaz F., Korkmaz M.A., Ors B.
ICECS 2023 - 2023 30th IEEE International Conference on Electronics, Circuits and Systems: Technosapiens for Saving Humanity
International· Citations: 2
DOI: 10.1109/ICECS58634.2023.10382743
Lookupx: Next-Generation Quantization and Lookup Techniques for Empowering Performance and Energy Efficiency
Koksal C.I.R., Cicek N.M., Metin A.Y., Ors B.
ICECS 2023 - 2023 30th IEEE International Conference on Electronics, Circuits and Systems: Technosapiens for Saving Humanity
International
DOI: 10.1109/ICECS58634.2023.10382787
Optimization of the Eigenvalue Decomposition of Floating-Point Matrices on the TMS320C6672 Digital Signal Processor
Çaliş O., Yalçin M.E.
ICECS 2023 - 2023 30th IEEE International Conference on Electronics, Circuits and Systems: Technosapiens for Saving Humanity
International
DOI: 10.1109/ICECS58634.2023.10382734
Optimizing Data Availability and Utilization in Deep Learning Accelerator SoCs
Koksal C.I.R., Cicek N.M., Metin A.Y., Ors B.
ICECS 2023 - 2023 30th IEEE International Conference on Electronics, Circuits and Systems: Technosapiens for Saving Humanity
International· Citations: 1
DOI: 10.1109/ICECS58634.2023.10382797
Technical Program Chair Message
Herencsar N., Yalçin M.E.
ICECS 2023 - 2023 30th IEEE International Conference on Electronics, Circuits and Systems: Technosapiens for Saving Humanity
International
DOI: 10.1109/ICECS58634.2023.10382951

2022

Journal Articles

The deep multichannel discrete-time cellular neural network model for classification
Abtioglu E., Yalcin M.E.

International Journal of Circuit Theory and Applications, Vol. 50, No. 11, pp. 4171–4178

International· Q2
DOI: 10.1002/cta.3401

Conference Papers

RPL Authenticated Mode Evaluation: Authenticated Key Exchange and Network Behavioral
Ordu A.B., Bayar M., Ors B.
International Conference on Ubiquitous and Future Networks, ICUFN
International· Citations: 1
DOI: 10.1109/ICUFN55119.2022.9829601

2021

Journal Articles

Comparison of RISC-V and transport triggered architectures for a postquantum cryptography application
Akçay L., Örs B.

Turkish Journal of Electrical Engineering and Computer Sciences, Vol. 29, No. 1, pp. 321–333

International· Q3· Citations: 13
DOI: 10.3906/ELK-2003-27
Delayed outputs fractional-order hyperchaotic systems synchronization for images encryption
Bouridah M.S., Bouden T., Yalçin M.E.

Multimedia Tools and Applications, Vol. 80, No. 10, pp. 14723–14752

International· Q2· Citations: 5
DOI: 10.1007/s11042-020-10425-3
End-to-end secure iot node provisioning
Yavuz I., Ors B.

Journal of Communications, Vol. 16, No. 8, pp. 341–346

International· Q3· Citations: 5
DOI: 10.12720/jcm.16.8.341-346
Four-scroll chaotic attractor and four-scroll hyperchaotic attractor generated from a new four-dimensional dynamical system
Benkouider K., Bouden T., Yalcin M.E., Sambas A., Mujiarto, Pahmi M.A., Sutoni A., Widjajani

Journal of Physics: Conference Series, Vol. 1764, No. 1

International· Citations: 2
DOI: 10.1088/1742-6596/1764/1/012204

Conference Papers

A Model Based Hardware Implementation of Traffic Regulator in ARINC-664 End System
Uzuner M., Hökelek I., Örs B.
2021 13th International Conference on Electrical and Electronics Engineering, ELECO 2021
International
DOI: 10.23919/ELECO54474.2021.9677677
A Triangular Systolic Array Based Digital Architecture for Computing Eigenvalues of Asymmetric Matrix
Ozturk E., Koseoglu I., Yalcin M.E.
International Workshop on Cellular Nanoscale Networks and their Applications
International· Citations: 1
DOI: 10.1109/CNNA49188.2021.9610808
An FPGA implementation of a RISC-V based SoC system for image processing applications
Gholizadehazari E., Ayhan T., Ors B.
SIU 2021 - 29th IEEE Conference on Signal Processing and Communications Applications, Proceedings
National· Citations: 12
DOI: 10.1109/SIU53274.2021.9477998
An FPGA Implementation of Givens Rotation Based Digital Architecture for Computing Eigenvalues of Asymmetric Matrix
Koseoglu I., Ozturk E., Ayhan T., Yalcin M.E.
2021 13th International Conference on Electrical and Electronics Engineering, ELECO 2021
International· Citations: 1
DOI: 10.23919/ELECO54474.2021.9677749
Custom TTA Operations for Accelerating Kyber Algorithm
Akcay L., Örs B.
2021 13th International Conference on Electrical and Electronics Engineering, ELECO 2021
International· Citations: 2
DOI: 10.23919/ELECO54474.2021.9677863
Design and Implementation of a 32-bit RISC-V Core
Yilmaz Y., Tozlu Y.S., Örs B.
2021 13th International Conference on Electrical and Electronics Engineering, ELECO 2021
International· Citations: 2
DOI: 10.23919/ELECO54474.2021.9677678
Instruction Extension of RV32I and GCC Back End for Ascon Lightweight Cryptography Algorithm
Altinay O., Ors B.
2021 IEEE International Conference on Omni-Layer Intelligent Systems, COINS 2021
International· Citations: 9
DOI: 10.1109/COINS51742.2021.9524190
Model-Based Kalman Filter Design on an FPGA
Ordubag M., Örs B.
2021 13th International Conference on Electrical and Electronics Engineering, ELECO 2021
International· Citations: 2
DOI: 10.23919/ELECO54474.2021.9677746
Multi-Layer Perceptron Hardware Accelerator on RISC-V Processor
Koca N.A., Yildiz B., Demirkol Y.C., Örs B.
2021 13th International Conference on Electrical and Electronics Engineering, ELECO 2021
International· Citations: 1
DOI: 10.23919/ELECO54474.2021.9677758
RFC 2544 Ethernet Performance Measurements Using FPGA Based Dual-Core ARM
Özcan A., Yalçin M.E.
2021 13th International Conference on Electrical and Electronics Engineering, ELECO 2021
International· Citations: 1
DOI: 10.23919/ELECO54474.2021.9677781
System-Level, Model-Based Power Estimation of IoT Nodes
Ozkaya O., Ors B.
7th IEEE World Forum on Internet of Things, WF-IoT 2021
International· Citations: 4
DOI: 10.1109/WF-IoT51360.2021.9595622

Random Number Generators

Mon, 01 Jan 0001 00:00:00 +0000

Hardware Implementations of True Random Number Generators and Physically Unclonable Functions

Design of a High-Speed True Random Number Generator and an Asynchronous AES Processor

Deep convolutional neural networks used for classification, including AlexNet, VGG-16, InceptionNet, and ResNet, have been examined. These networks are typically implemented on GPUs and require substantial computational resources and energy consumption. We are investigating methods that enable them to operate on embedded systems while reducing their power consumption.

Reliable Processor Design and Implementation

Mon, 01 Jan 0001 00:00:00 +0000

Reliable Processor Design and Implementation

Theses

Buse Ustaoğlu, “Fault-Tolerant Microprocessor Design,” 2015.

Publications

B. Ustaoğlu, B. Örs, “Fault Tolerant Register File Design for MIPS AES-Crypto Microprocessor,” ICECS 2015.

Research Projects

Mon, 01 Jan 0001 00:00:00 +0000

Research Projects

TÜBİTAK

[2006–2008] Integrated Implementation of Continuous-Time Chaotic Systems and Their Use in Random Number Generation, Career Development Program.
[2007–2010] Novel Distributed-Parameter Amplifier Architectures for Broadband Power Applications, 1001.
[2006–2011] Design and Implementation of an Artificial Neural Network for Signal Processing Using Nonlinear Spatiotemporal Waves and Its Application to Robot Navigation, 1001.
[2007–2010] Design and Implementation of Cryptographic Systems Resistant to Side-Channel Analysis, Career Development Program.
[2010–2012] Low-Power Public-Key Cryptographic Systems for Smart Cards and Resource-Constrained Devices, 1001.
[2011–2014] Design and Implementation of Secure RFID Systems, 1001.
[2018–] Development of a National Mobile White-Box Cryptographic Library and an End-to-End Secure Communication System, 2244.
[2020–2022] Instruction Extension of a RISC-V Processor for a Driver Fatigue Detection System and Its Implementation, 2535.
[2021–2023] In-Situ Effective Clutter Suppression and Target Detection Using a Low-Cost Mobile Ground-Penetrating Radar System, 1001.
[2021–2023] Design of a Custom Direct Memory Access Module and Its Implementation in a System-on-Chip, 1505.
[2021–2023] Design and Implementation of an On-Chip Active Shield, 1505.

TÜBİTAK International Bilateral Cooperation

[2007–2010] Modeling and Planning of Metropolitan Areas Using Self-Organizing Dynamic Networks and Its Application to Istanbul, Italian Ministry of Foreign Affairs.
[2009–2011] Design and Electronic Implementation of a Multi-Scroll Chaotic Attractor-Based Random Number Generator for Encryption, Ministry of Science and Technology of the People’s Republic of China (MOST).
[2013–2017] Memristor-Based Circuit Architectures, Italian Ministry of Foreign Affairs.

Ministry of Industry — SanTez

[2014–2015] Passive Combiners and a Power Management Unit for High-Power (>1 kW) HF Transmitters, Netaş Telekom A.Ş.
[2012–2013] Protection of Intellectual Property Rights Using Physically Unclonable Functions and Helper Data, and Ensuring the Security of Proprietary Algorithms and Hardware, Vestek.
[2011–2014] Design and Implementation of a DVB-S/DVB-S2 Demodulator Board, Profen.

Ministry of Development

[2014–2017] Hardware Implementation of a Sensor-Based Blind Estimation System for Indoor Environments, Republic of Türkiye Ministry of Development, Researcher Training Program (ITU-AYP).
[2017–2020] Design and Implementation of a Network Processor on Field-Programmable Gate Arrays, Researcher Training Program (ITU-AYP).

Scientific Research Projects Unit (BAP)

[2006–2011] Design and Implementation of a Programmable Neural Network Generating Spatiotemporal Waves.
[2006–2008] Embedded System Design for Cryptographic Algorithms.
[2006–2008] Side-Channel-Resistant Design and FPGA Implementation of the AES Algorithm.
[2013–2015] Hardware/Software Co-design of Digital Signal Processing Systems.
[2018–2019] Design and Implementation of an Internet of Things Node Using an Open-Source Processor and Operating System.
[2018–2020] System-on-Chip Design for a Secure Internet of Things Network.

State Planning Organization

[2010–2013] RF/Mixed-Signal VLSI Measurement and Characterization Laboratory and Center of Excellence.
[2012–2014] Vehicle Technologies Research and Development Center, State Planning Organization.

KOSGEB

[2015] Development of Security Application Software Using Sensor-Assisted Image-Processing Techniques, Bilişim Park Yazılım Sistemleri Müh. San. ve Tic. A.Ş.

Consulting

[2016] Development of a Pharmaceutical and Materials Management System, Simeks Tıbbi Sistemler San. Tic. A.Ş. (SIMEKS).
[2016–2018] Development of a Domestic In-Vehicle Radio, Advanced Positioning and Route-Guidance, Entertainment, and Communication Device, Daiichi Elektronik Sanayi ve Ticaret A.Ş.
[2009–2010] Embedded Design Center, Eczacıbaşı Bilişim.
[2009–2010] Design, Implementation, and Integration of Advanced Encryption Standard (AES) Hardware, Eczacıbaşı Bilişim.
[2010–2011] Implementation of the GOST-Standard Encryption Algorithm on Smart Cards, Turkcell.
[2012–2015] System-on-Chip Design and ASIC Fabrication of the Open-Source 32-Bit LEON3 Microprocessor and Implementation of a GPS-Based Embedded-System Application, Anka Microsystems.
[2015–2017] Design and Implementation of a Common-Interface Conditional Access Module for Digital Video Broadcasting, NETA Elektronik.
[2016] Automated Medication and Supply Management System, Triatech Medical Systems.
[2017] Development of an Electromagnetically Immune Indicator for Weighing Systems, Tüm Elektronik Mühendislik (TEM).
[2018] Development of a Multimedia and Navigation Unit for the Automotive Industry, DAIICHI Electronics.
[2018–2019] Development of a National Mobile White-Box Cryptographic Library and an End-to-End Secure Communication System, Güvenpark.
[2018–2019] Development of a Weighing System Capable of Recognizing Products Using Image-Processing Technology and Providing Remote Access and Control, Tüm Elektronik Mühendislik (TEM).
[2018–2020] Design of a Real-Time Spectrum Analyzer, Profen Group.
[2019] Development of a Kinetic-Energy-Damped Load Cell Requiring High Speed and Precision and Supporting Multiple Digital Communication Outputs, Tüm Elektronik Mühendislik (TEM).
[2019–2020] Development of a High-Performance Hardware Security Module, Güvenpark.
[2020–2021] Development of a Cost-Effective Internal PCIe Hardware Security Module, Güvenpark.

European Union

[2014–2017] Building as a Service (BaaS).

Researcher Needs

Mon, 01 Jan 0001 00:00:00 +0000

Researcher Needs

TBA

Secure Internet of Things (IoT) Networks

Mon, 01 Jan 0001 00:00:00 +0000

Secure Internet of Things (IoT) Networks

We are working on the design and implementation of a system-on-chip intended for use in Internet of Things devices, with low power consumption as a primary design criterion.
An operating system suitable for IoT applications will be deployed on the designed system.
For this purpose, the open-source LEON3 and OpenRISC processors have been implemented on FPGA. Power analyses have been conducted for different applications, and IoT-compatible operating systems have been investigated.

Secure RFID and Payment Systems

Mon, 01 Jan 0001 00:00:00 +0000

Secure RFID and Payment Systems

Theses

Özen Özkaya, “Analysis and Implementation of an RFID Protocol Providing Location Privacy,” 2013.
Subutay Giray Başkır, “Hardware/Software Co-design and Implementation of Secure Applications Using Near-Field Communication,” December 2014, Türkiye.

Publications

S. G. Başkır, B. Örs, “Hardware/Software Codesign and Implementation for Secure NFC Applications,” 23rd Signal Processing and Communications Applications Conference (SIU), 2015.